Field of the Invention
The present invention relates to an internal power supply circuit, a semiconductor device, and a semiconductor device manufacturing method, and more particularly relates to an internal power supply circuit, a semiconductor device, and a semiconductor device manufacturing method which are capable of controlling a delay amount of an internal circuit.
Description of Related Art
A semiconductor device such as a DRAM is configured to operate not only with a voltage supplied from outside (an external voltage) but also with an internal voltage obtained by stepping up or stepping down the external voltage. The value of the internal voltage is adjusted at the time of manufacturing the semiconductor device by using a fuse trimming method or the like (see Japanese Patent Application Laid-open No. 2000-150799).
The semiconductor device includes a large number of internal circuits. An output signal of each of the internal circuits has a certain delay with respect to an input signal, and the amount of the delay varies due to a process fluctuation. Therefore, after forming the semiconductor device on a silicon wafer, it is desirable to make the amount of the delay of the output signal of each of the internal circuits adjustable.